The present invention relates to testing of a semiconductor device, and more specifically, to automated selective testing of a semiconductor device.
When a semiconductor design such as for a wafer, module, application specific integrated circuit (ASIC), or very large scale integrated circuit (VLSI) is tested, the testing involves a set of commercially available test patterns specific to the product under test. The commercially available test pattern generator output is made platform specific by an on-site test pattern processor that may support several test system platforms, for example. While the test pattern generator provides an efficient source for comprehensive testing of the product, the processing of all the test patterns can become time-consuming. At various stages of development, quick feedback from testing is important to determine, for example, new patterns that must be tested to isolate any issues. Thus the time associated with the test pattern processor processing all the test patterns may present issues.